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TrueConnect 2017
Date: Thursday, December 7, 2017
Time: 9 AM to 5 PM (IST)
Venue: Hotel Park Plaza, Outer Ring Road, Marathahalli, Bengaluru

Many organizations have a commitment to their communities, be it through philanthropic efforts or hands-on projects. For Truechip, however, this commitment is more than just part of what we do. Having this in center, TrueConnect 2017 - "Enriching collaboration for innovative excellence" is the first edition of the Verification & Design conference from the house of Truechip Solutions. This one-day conference will focus on sharing and presenting innovative studies done by industry professionals in the field of verification IP product, solutions and services. The conference will also be having Key notes and panel discussions along with the Key notes by Industry leader.

Main Attraction

1) Paper & Presentations:

Industry professionals from EDA industry will present presentation and papers on design & verification and the best presentation(s) will be chosen and will be bestowed awards.

2)Keynote Speakers & Panel Discussion

Listen to the Industry Experts- Immerse yourself in the treasures of the wise word - Step into the world of Design and automation- Explore migration patterns through the medium of discussions - Get to grips with the UVM language - Uncover the meaning of SoC - Discover a 'New FAB'

Industry experts will share thoughts on the current global trends in the field of design & verification space, opportunities, challenges, strength and weakness of the sector and the vast scalability of this domain.

3) The Technology Gully:

Check out the new products and solutions from Industry conglomerate where they would be showcasing the innovative technology to the industry professionals

4) Cultural Program:

All work and no play makes jack a dull boy. Enjoy the rejuvenating high energy culture show to discover and be inspired by the breadth and quality of the show.

5) Networking Opportunities:

We recognize the value of providing the right environment to learn about new business opportunities or contacts. Trueconnect is an ideal event to expand one’s knowledge and meet new contacts in the industry along with sharing novel practices.

Keynote Speaker & Panel Profile

Thursday December 7, 10:00 AM - 10:30 AM | EVENT TYPE: KEYNOTE | Invited Keynote

Speaker: Sanjay Gupta - NXP India Pvt. Ltd.

Biography: Sanjay Gupta is the Vice President and India Country Manager at NXP India Pvt. Ltd. Sanjay is responsible for leading NXP's business in India and ensuring local compliance with government and corporate programs and policies. He is leading three diverse R&D locations (Noida, Bangalore and Hyderabad) consisting of nearly 1,800 employees representing all NXP product groups. He is also the Automotive Leader for the Indian Subcontinent taking care of all the Business & R&D aspects. He is the Chairperson for Innovation board for BU Automotive across the global sites. Sanjay started his professional journey with Motorola in 1996 and has worked on assignments in the Wireless business, Digital Networking, Industrial MCU and the Automotive organizations. He holds multiple U.S. patents and numerous Industry publications in leading media verticals. He also represents NXP in IESA (India Electronics & Semiconductor Association) along with leading Automotive CiG for the Country. Sanjay earned his bachelor's degree in Engineering in Electronics and Communication from Delhi College of Engineering, and his MBA from the Indian School of Business - Hyderabad.


Thursday December 7, 12:20 PM - 12:50 PM | EVENT TYPE: KEYNOTE | Invited Keynote

Speaker: Uday Mishra - Western Digital

Uday Mishra is currently Director of Engineering with Western Digital at Bangalore. He is heading the SoC Design group of 100+ engineers responsible for high performance ASIC development for multiple product lines within Western Digital. He is regarded as one of the foundation stone for success story of Western Digital India in delivering high quality ASICs since last twelve years. Uday has deep knowledge of all the phases of ASIC development gained through multiple ASIC tape outs during his twenty one years of VLSI industry experience. His area of expertise is in developing high performance architectures and low power methodologies to cater for Enterprise, Embedded & Mobile Flash Storage Product ASICs. Uday gained his Post Graduation degree from Royal Melbourne Institute of Technology, Melbourne, Australia thereafter worked with Freescale Australia for six years. He earned his Bachelor's degree from University of Delhi and started his career with defence sector working in embedded field for initial three years.


Thursday December 7, 14:00 PM - 14:40 PM | EVENT TYPE: PANEL DISCUSSION | Invited Panel Speaker

Speaker: Vijayabhaskar Sankaranarayanan - Qualcomm

Vijayabhaskar Sankaranarayanan received the Bachelor's degree in physics from Madras University, B.Tech degree in Electronics from Anna University and Executive Development at Leavey School of Business, Santa Clara University.He is currently working with Qualcomm as Principal Engineer / Director of Engineering for the Wireless SoC Design group at the Bangalore Development Center. He has over 18 years of experience working with various companies like Cypress Semiconductors and Hewlett-Packard. His interests include Wireless technologies like Bluetooth/Wifi, Wired connectivity like USB/USB Type-C. He has key expertise on SOC Design and Advanced verification methodologies. He has the expertise of building and leading teams to deliver critical products that has strong business impact.


Hon'ble Jury Member ,Prasad Joshi, Sr. Manager, IBM

Prasad Joshi has over 19 years of experience in Semiconductor industry & has played various leadership and management roles. He works with IBM India as a Senior Manager and presently leads the development of various interface IPs for IBM's P and Z Server class processors such as high speed SERDES. He has keen interest in front-end design tools & methodologies in general and specifically in functional verification. He has actively participated in various industry events as an organiser as well as a speaker.


Speaker: Amardeep Punhani:

Director Automotive Digital IP for India operations. He has been engaged with Automotive SoC / IP development in NXP for past 10 years, in various roles including SoC Chip lead, Global Digital IP Manager and now as a Director R&D, Digital IP. He has been involved in development of multi-million gate SoCs meant for Driver Information Systems. He and his team have been working on IP and Subsystem development across 12 domains including Automotive Safety, Security, Customer Processors for Radar, Vision ADAS, Graphics, Body Electronics and more. Before NXP, he has also worked in various capacities with Agilent Technologies India, NEC Australia in Melbourne and Altima Corporation in Japan. He has overall 18 years of experience. He did his Engineering from IIT-Roorkee and has also done MBA from IIM-Lucknow.

Start Time

End Time

Event

9:00 AM

10:00 AM

Registration & Tea Session

10:00 AM

10:10 AM

Welcome Note By Nitin Kishore, Founder & CEO, Truechip

10:10 AM

10:40 AM

Keynote Session 1-By Mr.Sanjay Gupta,Country Director, NXP

10:40 AM

12:20 PM

Paper Presentations

10:50 AM

11:15 AM

REUSING VIP SEQUENCES USING CONVERTOR METHOD - Truechip

11:20 AM

11:45 AM

Implications & modus operandi applied for 100% FSM Coverage Closure - Western Digital

11:50 AM

12:15 PM

Dynamic configurability in static blocks - Truechip

14:40 PM

15:05 PM

Technical aspects in choosing ?Verification Intellectual Property (VIP)- Innovative Logic Design Services Pvt Ltd

15:10 PM

15:35 PM

Robust Approach to verify Training requirements of high bandwidth memory IPs - Open Silicon

15:40 PM

16:05 PM

SoC boot up process and image loading techniques - Truechip

12:20 PM

12:50 PM

Keynote Session 2-By Mr. Uday Mishra,Director Engineering, WD

12:50 PM

14:00 PM

Networking Lunch + booth visits

14:00 PM

14:40 PM

Panel Discussion

14:40 PM

16:00 PM

Paper Presentations

16:00 PM

16:20 PM

Networking Tea Session + booth visits

16:20 PM

16:45 PM

Special Show,Banglore's# 1 Stand Up Comedian-Jagdish Chaturvedi

16:45 PM

16:55 PM

Prize Distribution

16:55 PM

17:00 PM

Closing Ceremony

1st Prize

INR 10,000

Winner- Mr. Surya Nallathambi and Mr. Jayakanthan Arthanari
Title- Implications & modus operandi applied for 100% FSM Coverage Closure
Company Name- Western Digital

2nd Prize

INR 7,000

Winner- Mr. Giridhar Chelluri and Mr. Sukhjeet Singh
Title- Dynamic configurability in static blocks
Company Name- Truechip

3rd Prize

INR 5,000

Winner- Ms. Prajakta Rohom and Mr. Mukul Goyal
Title- Robust Approach to verify Training requirements of high bandwidth memory IPs
Company Name- Open Silicon